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3rd IEEE International Workshop on Silicon Debug and Diagnosis (SDD06)
October 26-27, 2006
Santa Clara Convention Center
Santa Clara, CA, USA

Held in Conjunction with ITC Test Week (ITC 2006)

http://evia.ucsd.edu/conferences/sdd/06/index.html

PRELIMINARY CALL FOR PAPERS

Scope and Mission -- Author Information -- Committees

Scope and Mission

Troubleshooting how and why circuits and systems fail is important and is rapidly growing in industry significance. Debug and diagnosis may be needed for yield improvement, process monitoring, debugging the design function, failure mode learning for R&D, or just getting a working first prototype. But the detective work can become tricky. Sources of difficulty include circuit complexity, packaging, physical access, shortened product creation cycle, the traditional focus on just pass/fail testing, and missing tool and equipment capabilities. New and efficient solutions for debug and diagnosis will have a much needed and highly visible impact on productivity. The mission and objective of the SDD06 Workshop is to consider all issues related to debug and diagnosis of circuits and systems - from prototype bring-up to volume production.

The topics of interest include, but are not limited to, the following:

  • Debug Techniques and Methodologies
  • Structured Debug Architectures
  • Infrastructure IP for SDD
  • Design/Synthesis for Debug
  • Microprocessor Debug
  • Debug for FPGAs
  • Reuse of DFT for Debug and Diagnosis
  • Debug of Embedded Cores/SoCs
  • Digital/analog Turn-on
  • Methods & Tools
  • System Level Debug & Diagnosis
  • Equipment Impact and Techniques
  • Manufacturing & Prototype Environment
  • Silicon Debug Standardization
  • Case Studies
Author Information
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The workshop objective is to facilitate a valuable interactive information exchange. Both extended abstracts and full papers are acceptable for submission. Proposals that describe open issues, industry/technology needs or opinions are also welcome.

Length Guideline: 3 to 8 pages
Submissions due: August 1st
Acceptance Notification: September 1st
Final papers for inclusion into informal proceedings: September 22nd

Proposals for discussion panels and other special sessions are also invited. Please submit a 1 page abstract for these to the web site or contact the Program/Special-Session Chairs.

Authors of best paper submissions will be invited to contribute to an IET Proceedings Special Issue focused on Silicon Debug & Diagnosis.

For general information contact:

Mike Ricchetti - General Chair
ATI Research, Inc.
62 Forest Street
Marlboro, MA 01752-3028
Phone: (508) 486-1118
email: mricchetti@ati.com

For submission & program information contact:

Fidel Muradali - Program Chair
National Semiconductor
2900 Semiconductor Drive
Santa Clara, CA 95051
Phone: (408) 721-3246
email: fidel.muradali@nsc.com

Committees
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General Chair:
M. Ricchetti - ATI Research, Inc.

Program Chair:
F. Muradali - National Semi.

Special Sessions:
B. Vermeulen - Philips

Finance:
R. Chandramouli - ARM

Local Arrangement Chair:
I. Hartanto - Xilinx

Electronic Media:
I. Bayraktaroglu - Sun

Program Committee:
M. Abramovici - DAFCA
D. Appello - ST Microelectronics
C. Boit - TU Berlin
D. Burek - Magma
W-T Cheng - Mentor Graphics
J-L Carbonero - STMicroelectronics
B. Cory - nVidia
A. Crouch - Inovys
J. Figueras - U. Barcelona
D. Gizopoulos - U. Piraeus
K. Hatayama - STARC
Y.-C. Hsu - Novas
A. Ivanov - UBC
D. Josephson - Intel
R. Kapur - Synopsys
H. Kerkhoff - U. Twente
C. Landrault - LIRMM
T. McLaurin - ARM
C. Metra - U. Bologna
R. Molyneaux - Sun Microsystems
N. Nicolici - McMaster U.
Y. Okuda - Sony
A. Orailoglu - UCSD
P. Prinetto - Poli. Di Torino
M. Renovell - LIRMM
M.S. Reorda - Poli. Di Torino
G. Roberts - McGill U.
N. Stollon - First Silicon Solutions
C. Sul - Silicon Image
J. Tyzer - U. Poznan
S. Venkataraman - Intel
B. West - Credence
H. Wienrich - National Semi.

Steering Committee:
R. Aitken - ARM
F. Muradali - National Semi.
E. J. Marinissen - Philips
M. Ricchetti - ATI (Chair)
T. W. Williams - Synopsys
Y. Zorian - Virage Logic

For more information, visit us on the web at: http://evia.ucsd.edu/conferences/sdd/06/index.html

The 3rd IEEE International Workshop on Silicon Debug and Diagnosis (SDD06) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society– Test Technology Technical Council

TTTC CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

SENIOR PAST CHAIR
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com


TTTC 2ND VICE CHAIR
Joan FIGUERAS
Universitat Politècnica de Catalunya - Spain
Tel. +34-93-401-6603
E-mail figueras@eel.upc.es

FINANCE
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

DESIGN & TEST MAGAZINE
Tim CHENG
University of California, Santa Barbara - USA
Tel. +1-805-893-72942
E-mail timcheng@ece.ucsb.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG

Lucent Technologies
- USA
Tel. +1-732-949-5539
E-mail chenhuan@lucent.com

TECHNICAL ACTIVITIES
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

ASIA & SOUTH PACIFIC
Hideo FUJIWARA
Nara Institute of Science and Technology - Japan
Tel. +81-74-372-5220
E-mail fujiwara@is.aist-nara.ac.jp

LATIN AMERICA
Marcelo LUBASZEWSKI
Federal University of Rio Grande do Sul - Brazil
Tel. +34-93-401-6603
E-mail luba@vortex.ufrgs.br

NORTH AMERICA
William R. MANN
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

 

PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 1ST VICE CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

SECRETARY
Christian LANDRAULT
LIRMM - France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

INTERNATIONAL TEST CONFERENCE
Scott DAVIDSON
Sun Microsystems
- USA
Tel. +1-650-786-7256
E-mail scott.davidson@eng.sun.com

TEST WEEK COORDINATION
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Piraeus
- Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys
- USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Zebo PENG
Linköping University - Sweden
Tel. +46-13-282-067/-281-000
E-mail zpe@ida.liu.se

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
Michael NICOLAIDIS
iRoC Technologies - France
Tel. +33-4-381-20763
E-mail michael.nicolaidis@iroctech.com

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it


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